The invention relates to a system for error control and phasing in interconnected ARQ-circuits, since the durations of the repetition cycles of the ARQ-circuits, as compared to one another, are not equal. As it is well known, an ARQ-circuit comprises a transmitter-receiver at each end of a transmission path, and that each transmitter comprises a repetition store in which some of the last-transmitted signals are recorded. If at the receiving end an error is ascertained among received, signals reeived, then the transmitter at the receiving end transmits an RQ-signal or a request for repetition, whereupon the transmitter at the transmitting end transmits a specific signal to indicate that the signals will be repeated, after which the contents of the aforesaid repetition store are transmitted. It is a simple thing to realize that the duration of such a repetition procedure and the contents of the repetition store are dependent on the propagation time, and, among other things, on the length of the transmission path. Besides for error control a procedure of this kind can also be utilized for phasing. Therefore for the sake of efficiency it is desirable that the repetition time for a certain transmission path always has a fixed duration, which duration is related to the propagation time.
A problem arises when, in a telecommunication system, a number of ARQ-circuits having different repetition times are interconnected in series. When an error presents itself in an n th circuit of such a system, the receiving end of this circuit will send back a request for repetition to the transmitting end. The transmitting end then repeats the last-transmitted signals, but during that time it cannot deal with traffic from the immediately preceding circuit, that is from a circuit from which information is offered to this transmitter. In order to prevent the information from the preceding circuit from getting lost, this preceding circuit is made to repeat as well; and the same occurs with all the other preceding circuits. Even in the circuits that follow, that are the circuits to which information is offered by the said circuit, a repetition procedure is initiated. In case the repetition cycles of the various circuits are not equal, it may take much time before all the ARQ-procedures end at the same instant.